Semiconductor devices, such as magnet random access memory (MRAM) devices, use magnetic memory cells to store information. Information is stored in the magnetic memory cells as an orientation of the magnetization of a free layer in the magnetic memory cell as compared to an orientation of the magnetization of a fixed (e.g., reference) layer in the magnetic memory cell. The magnetization of the free layer can be oriented parallel or anti-parallel relative to the fixed layer, representing either a logic “1” or a logic “0.” The orientation of the magnetization of a given layer (fixed or free) may be represented by an arrow pointing either to the left or to the right. When the magnetic memory cell is sitting in a zero applied magnetic field, the magnetization of the magnetic memory cell is stable, pointing either left or right. The application of a magnetic field can switch the magnetization of the free layer from left to right, and vice versa, to write information to the magnetic memory cell.
One of the objectives of MRAM is to have a low operating power and small area. This objective requires a low switching field for the magnetic memory cell, because a low switching field uses a low switching current, which uses less power, and because smaller currents require smaller switches, which occupy less space. However, as the area of the magnetic memory cells becomes increasingly smaller, a process referred to as “scaling” due to the fact that the area of the magnetic memory cell is scaled down to allow for more magnetic memory cells in the same area, the switching field actually increases.
U.S. Pat. No. 6,545,906 issued to Savtchenko, et al., entitled “Method of Writing to Scalable Magnetoresistance Random Access Memory Element” (hereinafter “Savtchenko”) describes a toggle free layer for use in MRAM devices. Prior to Savtchenko, MRAM devices employed a single free layer design. Both of these approaches, however, are prone to the problems associated with scaling that are described above. Namely, as the size of the magnetic memory cell is scaled down, an increased amount of power is required to switch the magnetic memory cell. For example, as much as 80 Oersteds (Oe) can be required to switch a 150 nanometer (nm) toggle magnetic memory cell.
Thus, scalable magnetic memory devices having reduced switching fields would be desirable.